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[VHDL-FPGA-Verilogmdct.tar

Description: 这是06年4月刚刚完成的程序,从opencore.org下载而来。用vhdl语言描写,以及matlab仿真,testbench,以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation. -This is April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete cosin e transform implementation designed for use in JPEG compression systems like. Architecture i 's based on parallel distributed arithmetic wit h butterfly computation.
Platform: | Size: 1767424 | Author: 陈朋 | Hits:

[DSP programDCT-DSP

Description: DCT算法在DSP上的实现,汇编语言,在DSP开发板上调试通过-DCT algorithm on DSP realization of assembly language, in DSP development board through debugging
Platform: | Size: 167936 | Author: suobin | Hits:

[Graph programDCT-vhdl

Description: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现-This is a two-dimensional 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realize
Platform: | Size: 10240 | Author: liujl | Hits:

[Graph programquantizer

Description: 这个DCT的源代码Core was tested on Digilent S3 board with Spartan Xc3S1000 FPGA-The DCT of source code Core was tested on Digilent S3 board with Spartan Xc3S1000 FPGA
Platform: | Size: 51200 | Author: lilei | Hits:

[VHDL-FPGA-Verilogjpeg.tar

Description: This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is not limited. It takes an RGB input (row-wise) and outputs to a memory the compressed JPEG image. Its quality is comparable to software solutions.
Platform: | Size: 3416064 | Author: Bill Guan | Hits:

[VHDL-FPGA-Veriloggolomb

Description: golomb编码,用于无损图像压缩等,基于quartusii平台。-golomb coding for lossless image compression, based on the platform quartusii.
Platform: | Size: 151552 | Author: Tangyao | Hits:

[VHDL-FPGA-Verilogdct

Description: JPEG Compression and Ethernet Communication on an FPGA
Platform: | Size: 44032 | Author: Dang Tien Dat | Hits:

[VHDL-FPGA-Verilog309361_88321a222b5ae22c

Description: DCT 图像处理 基于VHDL语言 简单可行-DCT image processing language based on VHDL
Platform: | Size: 10240 | Author: ken | Hits:

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